> For the complete documentation index, see [llms.txt](https://andre-araujo.gitbook.io/yolo-on-pynq-z2/llms.txt). Markdown versions of documentation pages are available by appending `.md` to page URLs; this page is available as [Markdown](https://andre-araujo.gitbook.io/yolo-on-pynq-z2/abstract.md).

# Abstract

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Object detection using **Deep Learning** is an alternative increasingly being used because of the accuracy of it's models. However, because of it's high demand of resources, the search for more compact and efficient solutions has been increasing.

For this situation comes the **PLD** (Programmable Logic Device) which combines a **FPGA** (Field Programmable Gate Array) with a CPU (Central Processing Unit) and constitutes a promising solution for **object detection**. This devices allow the implementation of functions in Hardware, making it possible for them to be executed with high speed and low power consumption. Big brands of FPGA's, like Xilinx, have been providing generic tools to embed different **Neural Networks** in different boards with different architectures.

This project has the objective of implementing a object detector using the development board from Xilinx, the **PYNQ-Z2**. Two models will be chosen: the **YOLOv3** and Tiny YOLO and with the help of the Xilinx tool **DNNDK**, they will be compressed to obey the limitations of the board. In the end, the YOLOv3 obtained a mAP of 0,4036 and the Tiny YOLO a mAP of 0,0542. The results constitute a good progress on the development of this technology on a Low Cost FPGA and is prone to future upgrades.

**Key words:** Deep Learning, PLD, FPGA, PYNQ-Z2, YOLO, object detection, DNNDK.